1. Field of the Invention
The present invention generally relates to analog to digital signal converters and more particularly to flash analog to digital converters that utilize very low voltages.
2. Description of the Related Art
As integrated circuit technology advances, digital circuits are proliferating. Yet, many digital circuits receive inputs that are analog in nature. Analog to digital converters (ADCs) are used to convert the analog input signals to digital form. A family of ADCs known as xe2x80x9cflash ADCsxe2x80x9d are almost exclusively used where conversion speed is the highest concern. As power supply voltages decrease with newer technologies, the design of flash ADCs becomes more challenging. One way to ease the ADC design is to use digital calibration to correct for non-idealities in the analog portion of the circuit.
More specifically, effective gain adjustment or calibration through the ADC can be achieved by modifying the gain of the driver stage of the ADC. However, this can be quite difficult in some amplifiers where the gain is controlled via feedback resistors. In this case, the closed loop gain is controlled by the ratio of resistors. Adjusting the resistor ratio to control the gain has unpleasant effects. In the simplest form, such a solution must add transistors in the resistor path to act as switches. However, such structures add unwanted capacitance to the circuit resulting in a speed reduction and can cause instability.
Therefore, there is a need for a structure which controls the digital calibration of ADC""s without altering the gain of the driver or the makeup of the resistor strings. The invention described below achieves this benefit using a cost-effective straightforward structure that is easily implemented.
It is an object of the present invention to provide a flash analog to digital converter that includes a reference ladder, consisting primarily of resistors, a plurality of comparators, each coupled to a different reference voltage on the reference ladder (the comparators compare a received voltage with a reference voltage level developed across a corresponding resistor or group of resistors), and a variable power source coupled to the reference ladder for varying the reference levels generated from the ladder. The structure includes a fixed gain driver supplying the received signal voltage to the bank of comparators. The variable power source can be an adjustable current source or an adjustable voltage source. The comparators can be single-ended comparators or differential comparators.
The invention greatly simplifies the design of the driver used in the ADC by eliminating the requirement that the gain be adjustable. If gain is adjusted in the driver, the circuitry is much more complex, which results in slower circuit performance. To the contrary, instead of using an adjustable gain driver, the invention uses a simpler fixed gain driver and an adjustable source to drive the resistor ladder, thus providing adjustable reference levels.